1. Field of the Invention
The present invention relates to a device and a method for testing a buffer memory which stores a copy of data stored in a main memory and processes the data at a high speed, in place of the main memory, upon receiving a request from a CPU.
2. Description of the Related Art
In a conventional system having a buffer memory, when data in a main memory is rewritten by another device different from the device connected to the buffer memory, the data in a storage region of the buffer memory corresponding to a storage region in the main memory is invalidated. The above buffer memory requires a test for checking whether the data is invalid or not.
FIG. 9 illustrates a concrete example of a conventional method of testing the invalidity of the data in the buffer memory and FIG. 10 illustrates another concrete example of a conventional method of testing the invalidity of the data in the buffer memory.
In these drawings, reference numeral 100 denotes a processing unit 1 which is, for example, a CPU, reference numeral 101 denotes a processing unit 2 which is an I/O unit such as a disk unit, 102 denotes a main memory which stores a test program for testing the invalidity of the data in the buffer memory, and reference numeral 103 denotes a buffer memory which copies and holds part of the content of the main memory.
In the main memory 102, reference numeral 110 denotes a test data storage region (storage region X of the region) where an initial value A will be stored.
Reference numeral 111 denotes an expected-value-holding region where there will be stored an expected value that is to be compared with the result of testing the invalidity of the data in the buffer memory 103. Reference numeral 112 denotes a read value comparator means which, after the test data are stored in the test data storage region (storage region X), reads the data of the corresponding storage region X' of the buffer memory and compares them to determine whether the data invalidation is normally carried out or not.
FIG. 9(A) illustrates the initialization step when the test data (initial value A) is stored in the predetermined storage region 110 from the processing device 2 (101). In this state, the separately prepared test data (i.e. the initial value A) is read from the processing unit 1 (100), and the initial value A is read as a read value A and written into the predetermined storage region X' of the buffer memory 103 (which corresponds to the test data storage region 110 (storage region X) of the main memory 102).
FIG. 9 (B) illustrates the writing of test data.
A write value B of the test data is written into the test data storage region 110. At the same time, an expected value B is written into the expected value-holding region 111. As the write data B is written by the processing unit 2 (101) into the test data storage region 110, the storage region X' of the buffer memory 103 is invalidated by a memory control unit (not shown).
FIG. 9 (C) illustrates the case where the data stored in the buffer memory 103 is precisely invalidated.
The read value comparator means 112 takes out the expected value B from the expected value-holding region 111, takes out the read value B from the storage region X' of the buffer memory 103, and compares them. A correct result of comparison is output.
FIG. 9 (D) illustrates the case where the data stored in the buffer memory is not precisely invalidated (failure of the data invalidation).
The read value comparator means 112 takes out the expected value B from the expected value-holding region 111, takes out the read value A from the storage region X' of the buffer memory 103, and compares them. A result of comparison indicating the failure of the data invalidation is output.
FIG. 10 is a flow chart illustrating a conventional method of testing the data-invalidation of the buffer memory.
The flow will now be explained according to the numbers representing the steps of the drawing.
S1 The processing unit 1 (100) takes out the test data from the processing unit 2 (101), and stores the initial value A in the test data storage region (storage region X) of the main memory 102 (see FIG. 9(A)).
S2 The processing unit 1 (100) reads the initial value A from the test data storage region 110 of the main memory 102. As a result, the read value A is written into the storage region X' of the buffer memory (see FIG. 9(A)).
S3 The processing unit 1 (100) takes out the write value B from the processing unit 2 (101) and writes the test data B (write value B) into the test data storage region (storage region X) 110 of the main memory (see FIG. 9 (B)). As a result, the data stored in the buffer storage region X' is invalidated by the memory control unit (not shown). Moreover, the processing unit 1 (100) writes the expected value B into the expected value-holding region 111 (see FIG. 9 (B)).
S4 The processing unit 1 (1001) reads the read value from the storage region X' of the buffer memory device 103.
S5 When the data stored in the storage region X' of the buffer memory 103, has been correctly invalidated, since the data stored in the storage region X' (113) of the buffer memory has also been invalidated, the processing unit 1 (100) reads the write value B from the storage region X of the main memory 102 (see FIG. 9(C)).
S6 The read value comparator means 112 compares the expected value B of the expected value-holding unit 111 with the write value B read out from the storage region X, and outputs data showing that the stored data therein are correctly invalidated invalidation normal since they are identical to each other (see FIG. 9 (C)).
S7 When the data stored in the buffer memory 103 is not correctly invalidated (failure of data invalidation), the processing unit 1 (100) reads the read value A from the storage region X' (113) of the buffer memory 103.
S8 The read value comparator means 112 compares the read value A read out from the storage region X' of the buffer memory 103 with the expected value B in the expected value-holding region 111, and judges that the invalidation of the data stored in the buffer memory 103 is incorrectly carried out, since they are not in coincided with each other (see FIG. 9 (D)).
In the conventional test for checking the invalidation of the buffer memory, means was necessary for holding the expected value and for comparing the read value with the expected value. In the case of the system in which the buffer memory for commands and the buffer memory for operands exist independently of each other, it is difficult to read out the content of the buffer for commands. Therefore, a method to estimate whether data is read out from the buffer memory for commands, or the main memory data is read out from the main memory, utilizing only the result of the execution of the command, was available. Therefore, it has been virtually impossible to check the invalidity of data stored in the buffer memory for commands. Furthermore, the device of the prior art was complex and bulky and required an extended period of processing time.